The specific principle of AD conversion of successive approximation method should be as detailed and

The basic principle is to test and compare from high to low position bit by bit, as if using a balance to weigh an object, and increasing or decreasing the weight from heavy to light step by step. The successive approximation conversion process is that the registers are approximated one by one at the time of initialization.

Everybody, clear zero; At the beginning of the conversion, the highest position of the register 1 is approached one by one, and the analog quantity generated by the D a converter is fed to the D a converter.

Feed into the comparator.

It is called VO, and is compared with the analog VI to be converted by feeding into the comparator, if VO is then set to the second high position of the successive approximation register to 1, the new digital quantity in the register is sent to the D A converter, and the output VO is compared with VI again, and if the VO conversion is completed, the digital quantity in the successive approximation register is sent to the buffer register to obtain the output of the digital quantity. The process of successive approximation is carried out under the control of a control circuit.

A successive approximation AD converter is similar to a counter AD conversion, except that the digital quantities are generated by the successive approximation register SAR. SAR uses the "bisecting search method" to generate the digital quantity, taking the 8-bit digital quantity as an example, SAR first produces half of the 8-bit digital quantity, that is, 10000000B, and tests the size of the analog quantity VI, if VO>VI, clears the highest bit, if VOVI, the "control circuit" clears the highest bit, if VO3) After the highest bit is determined, SAR determines the next high position by the bibliometric search method, that is, half of the lower 7 digits y1000000b (Y is the determined bit) to test the size of the analog VI. After bit6 is determined, SAR uses the bisecting search method to determine bit5, that is, half of the lower 6 bits, yy100000b (y is the determined bit), and the size of the analog VI is tested. This process is repeated until the lowest bit0 is determined.

4) After the lowest bit bit0 is determined, the conversion is finished, and the "control circuit" sends the "conversion end" signal EOC. The falling edge of this signal locks the SAR output in a "buffer register", resulting in a digital output. As can be seen from the conversion process:

The start-up signal is valid for negative pulses. The end of conversion signal is low.

I think it's a bit like a dichotomy in math, like giving a number a and using 8 first'b1000000 (set to b) compared to a, if a is greater than b, the highest bit 1 is retained, that is, the original range becomes 0-7'b11111111 (8th confirmed). The rest of the process is like this, and you can repeat it.

Using a da converter, converting a digital quantity to an analog quantity and measuring an analog quantity to 0 is the digital quantity that is being measured.

There is a successive approximation register SAR in a successive approximation AD converter, and its digital quantity is generated from it. SAR uses a bisected search method to generate a numeric quantity, and in the case of an 8-digit numeric quantity, SAR first produces half of the 8-digit digit quantity, which is 8'b1000000, the size of the analog vi is tested. If vo>vi, it is clear that the highest position is clear; Otherwise, the highest position is retained.

After the highest digit is confirmed, SAR uses a bisecting search method to determine the next highest position, i.e., 8, which is half of the 7-digit number'by1000000 (y confirmed by the previous procedure) tentatively simulates the size of vi. And so on until bit0 is determined, the conversion is over.

I think it's a bit like a dichotomy in math, like giving a number a and using 8 first'b1000000 (set to b) compared to a, if a is greater than b, the highest bit 1 is retained, that is, the original range becomes 0-7'b11111111 (8th confirmed). The rest of the process is like this, and you can repeat it.

Based on the above theory, explain your example. I understand that your full-scale range should be 5V, so the first DA output, the input voltage is compared with the input voltage, and the input voltage is large, so it is taken between, that is, the highest local lift is reserved for 1. Then take the middle voltage in the new range, i.e., and so on, and you'll get the situation you're talking about.

I don't know if this is clear, I hope it can help you.