Urgent! How the RISC machine works is designed???

Wrong! In which book (computer composition and system architecture) science and technology chapter, you look for it, these things are still based on the textbook!!

Hope you can find it!!

(1) When determining the command system, only select the instructions that are used frequently and a small number of effective support operating systems, advanced.

Instructions for language and other functions; (2) Reduce the types of addressing methods, generally no more than two; (3) Let all instructions in one machine week.

Completed during the period; (4) Expand the number of general registers, generally not less than 32, and minimize the number of memory visits; (5) Most instructions are hard.

joint implementation, a few are implemented with microprograms; (6) Optimize the compiler to support high-level language implementation simply and effectively.

Basic technology: (1) Designed according to the general principles of RISC, that is, when determining the instruction system, select the most commonly used basic instructions, and attach a few pairs of operations.

The system supports the most useful instructions and streamlines the instructions. The coding is regular, and the types of addressing methods are reduced to the number. (2) Logical implementation.

Combine with hardwired and microprograms. That is, most simple instructions are implemented in a hard-wired way, and complex instructions are implemented with microprograms. (3)

with an overlapping register window. That is, in order to reduce memory access, reduce the addressing method and instruction format, and simply and effectively support high-level languages.

In the RISC machine, there are a large number of registers, so that the register windows of each process partially overlap. (4) Use running water and extension.

Late transfer implementation instructions can make the execution of this instruction overlap with the prefetching of the next instruction in time. In addition, the transfer instruction will be with the previous one.

An instruction on the surface reverses the position, so that the successful transfer always occurs after the execution of the immediately following instruction, so that the prefetch instruction is not invalidated, saving.

One machine cycle. (5) Optimize the design and compile the skin system. That is, try to optimize the register allocation and reduce the number of memory visits. It's not just about taking advantage of the routine.

means to optimize compilation, and can also adjust the order of instruction execution to minimize machine cycles, etc.

RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer) are the two architectures of current CPUs. They are distinguished by different CPU design philosophies and approaches.

Early CPUs were all CISC architectures, which were designed to accomplish the required computing tasks with minimal machine language instructions. For example, for multiplication, on a CISC CPU, you might need a command like mul addra, addrb can multiply addra by the numbers in addrb and store the result in addra.

The operations of reading data from Addra, AddRB into registers, multiplying and writing the results back to memory all rely on the logic designed in the CPU. This architecture increases the complexity of the CPU structure and the requirements for the CPU process, but it is very beneficial for the development of the compiler. For example, in the above example, a*=b in the C program can be compiled directly into a multiplication instruction.

Today, only Intel and its compatible CPUs still use the CISC architecture.

The RISC architecture requires software to specify the individual operating steps. If the above example is to be implemented on the RISC architecture, the operations of reading the data in addra, addrb into the register, multiplying and writing the result back to memory must be implemented by software, for example: mov a, addra; mov b, addrb; mul a, b; str addra, a。

This architecture can reduce CPU complexity and allow for the production of more powerful CPUs at the same level of process, but with higher requirements for compiler design.

In the late 70s of the 20th century, it was already felt that the increasingly complex instruction set was not only difficult to implement, but also had the potential to reduce the efficiency and performance of the system. Since 1979, a research team led by Parrerson at the University of California, Berkeley, has conducted an in-depth study on the rationality of the instruction set structure, and their research results show that CISC is not conducive to the use of pipeline technology to improve performance due to the complex function of instructions and poor regularity. The RISC instruction set compensates for this aspect of the CISC instruction set.

The RISC had to use pipeline technology to improve performance.

The RISC instruction length is fixed, the clock cycle is relatively fixed, and the number of instructions is large.

The CISC instruction length is variable, and the clock cycle fluctuates greatly, such as add and mul, and the number of instructions is relatively small.

The RISC instruction length is fixed, the clock cycle is relatively fixed, and the number of instructions is large.

In order to increase speed, the original CISC instruction is translated into RISC instruction and then executed, so some CISC machines may also use assembly technology.

RISC machines (reduced instruction set computers) are very clear due to their fixed instruction word length (opcode OP, addressing flags), and their CPUs are often hard-connected and combinatorial logic design, which is suitable for segmenting instructions according to different purposes in each period, so it is very suitable for machine instruction flow (each functional component in the CPU performs its own duties and is carried out in parallel).

CISC machines (complex instruction set computers) are generally implemented in the form of microprograms, and in the early stage, one of its machine instructions is generally interpreted by a microprogram (serial operation of several micro-instructions), and then due to the rise of RISC technology, in order to speed up CISC and compete with it, some CISC machines take the advantages of RISC and gradually optimize it to execute several micro-instructions in the microprogram in a parallel flow mode.

Therefore, some CISC machines may also use pipeline technology (microinstruction level), while RISC must adopt (machine instruction level).

CISC complex instruction set, RISC simple instruction set.

To make a few differences, CISC instructions are not of equal length, and RISC instructions are of equal length.

A CISC is more dependent on hardware than RISC to get a single instruction done, the logic circuitry is more complex than RISC, so it consumes more power, and RISC is relatively more dependent on compiler optimization.

Optics is definitely not possible, try to learn more, learn more and there is no harm to yourself, when you go out to find a job, who knows that the company wants that aspect of talent, isn't it?

These are just a few of the object-oriented language tools.

If you master any of these language ideas, it will not be difficult to learn the others, so you can choose to learn the same at the beginning.

Software designers need to learn not only the language of development, but also the knowledge of data structures, databases, networks, etc.

No, it can be ......

Preferably one or the other.

Tutorials for books Mock questions are OK.

It also depends on which one you are applying for.

Of course, it doesn't hurt to learn more.

risc：

1. Reduced instruction set computer, compared with CISC (complex instruction set computer), due to the reduction of about 80% of complex instructions, the pipeline is short, and the issuance is stronger and more efficient.

2. At present, the ARM chip used in a large number of mobile phones is a typical RISC processor. At the same time, some large commercial servers are also using RISC processors, such as IBM's Power 7.

CISC: 1. CISC is the basic processing component of a desktop computer system, and the core of each microprocessor is the circuit that runs instructions. Instructions consist of multiple steps to complete a task, either by passing values into a register or by adding them.

2. CISC is a microprocessor that executes a complete set of computer instructions, which originated from the MIPS host (i.e., RISC machine) in the 80s, and the microprocessors used in RISC machines are collectively referred to as RISC processors.

RISC is an abbreviation for Reduced Instruction Set, and the traditional CISC (Complex Instruction Set) contains a large number of instructions, which gradually expose many problems in use. For example:

The instruction system is too complex, the instruction length is uncertain, the addressing methods are diverse, and the number of instructions is large.

Most instructions take multiple clock cycles.

A variety of instructions can be accessed.

Dedicated registers exist.

It is difficult to optimize compilation during the compilation phase.

Most importantly, only a small number of instructions are actually used frequently in practice, and most of them are rarely used.

It is precisely in order to solve these problems that RISC is proposed, trying to use a small number of instructions to ensure the completeness of the instruction set, and then combine these instructions to implement the original complex instructions.

The instruction system is simple, the instruction format is consistent, the length is uniform, the addressing mode is small, and the total number of instructions is small.

Focusing on assembly line technology, most of the instructions can be completed in just one machine cycle.

There are only a few instructions that need to be accessed from memory, and they are tried to be computed in registers as much as possible.

There are a large number of general-purpose registers.

Easy to optimize compilation.

It can simplify hardware design, reduce production costs, etc.

At present, RISC and CISC are gradually merging. CISC needs to be streamlined to improve efficiency, and RISC needs to absorb the best of CISC to make up for its own shortcomings.

RISC, Reduced Instruction Computer; CISC, Complex Instruction Computer.

CISC is currently the main type of processor for home machines. The x86 and x64 systems dominated by Intel and AMD are typical CISC systems. This type of processor has a rich number of instructions inside, with unequal instruction words and rich functions.

Serial execution is an advantageous feature, with low concurrency, low efficiency and high power consumption, but low cost and high cost performance, which is suitable for general household use. In the non-critical business of most small and medium-sized enterprises, x86-based CISC processors can also be used, such as Intel's Xeon and AMD's Opteron, which are commercial-oriented CISC processors.

IBM researchers found through statistical methods that in traditional CISC processors, 20% of the instructions undertake 80% of the work, and the remaining 80% of the instructions are basically not used, or rarely used, which not only wastes the core area of the CPU, increases power consumption, but also reduces efficiency. That's where RISC comes in. The number of instructions in RISC is smaller than that of CISC, and some complex instructions in CISC need to be implemented by RISC with multiple simple instructions.

However, the instruction word is of equal length, with high efficiency, low power consumption and high concurrency. And the internal registers are abundant, and more emphasis is placed on the reasonable call of registers. However, high-performance RISC processors are cost-effective, cost-effective, and RISC chips from different companies are almost universal, and the ecological environment is more closed than X86's CISC, and the versatility cannot be compared with X86 at all, which is the biggest disadvantage of RISC.

High-performance RISC processors, such as IBM's Power 7 series, are used in mainframes and deployed in the core business of large enterprises. The low-power RISC processor often becomes the preferred processor for embedded products such as industrial control and mobile terminals. And the processor used inside the phone, Arm, is undoubtedly the most successful RISC processor today!

All CPUs based on x86 architecture are CISC, such as Intel's Pentium series, AMD's Athlon, VIA's CPUs including IBM Power, Intel Itanium, etc.