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Architectures and directives.
In fact, the architecture is a bit like the structure of the brain, what **anterior and posterior gyoracost, left and right occipital lobes of the brain, Bailuojia area and the like.
The instructions are more similar to brain waves as LS said.
Yes, the CPU can have its own set of external different instruction-level architecture (ISA), which can be understood as a type of brainwave.
Different types of ISAs cannot be executed together. For example, a command machine in x86**.
In the field of MIPS, this machine does not use this set of ** systems, so it cannot be the same.
A better way to explain this and this is to speak a different language like a person.
The Americans cannot manipulate the Chinese. Kindness.
Generally in the private domain, a series of CPUs corresponds to an ISA, because there is no need to be open.
In some places, multiple CPUs may correspond to one ISA to ensure compatibility.
Generally, it is difficult to have a single CPU to use multiple ISAs, and this situation requires ISA simulation.
Some CPUs also have an internal instruction (often referred to as macro-op in the x86 field) that is separate from the external instruction, and the external instruction is generally translated (decoded) into an internal instruction and executed on the internal execute unit.
The operating system, including the upper-level software, can also be said to be the soul of the computer.
Eventually, all of these things will be executed into assembly language and then into machine language.
When the language reaches the level of assembly and machine language, it is basically a formal instruction, these programs**, or instructions.
The hard disk over-memory reaches the CPU, enters, and then the execution can begin.
Until you get the result in retirement or something.
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In a computer, the CPU distinguishes between instructions and data by means of combinators, as follows:
1. Arithmetic Logic Unit (ALU). The arithmetic logic unit refers to the combined logic circuit that can realize multiple groups of arithmetic operations and logical operations, which is an important part of the first processing. The operation of arithmetic logic units is mainly to perform two-bit arithmetic operations, such as addition, subtraction, and multiplication.
In the process of calculation, the arithmetic logic unit is mainly to perform arithmetic and logical operations in a centralized computer instruction, generally speaking, ALU can play the role of direct read-in and read-out, which is embodied in the processor controller, Li Nahu memory and input and output equipment, etc., and the input and output are implemented on the basis of the bus. The input instruction contains an instruction word, which includes an opcode, a format code, and so on.
2. Intermediate register (IR). Its length is 128 bits, and the actual length of the wrapper is determined by the operand. IR plays an important role in the "enter the stack and fetch the number" command, in the process of executing the instruction, the content of the acc is sent to the ir, and then the operand is retrieved to the acc, and then the IR content is put into the stack.
3. Operational accumulator (ACC). Current registers are generally single accumulators, with a length of 128 bits. For ACC, it can be thought of as a variable-length accumulator.
In the process of narrating instructions, the ACC length is generally expressed based on the value of ACS, and the ACS length is directly related to the ACC length, and the doubling or halving of the ACS length can also be regarded as the doubling or halving of the ACC length.
4. Descriptor Register (DR). It is mainly used to store and modify descriptors. The length of the DR is 64 bits, and the use of descriptors plays an important role in simplifying the processing of data structures.
5. B register. It plays an important role in the modification of instructions, the B register length is 32 bits, the address modification amount can be saved in the process of modifying the address, and the main memory address can only be modified with descriptors. The first element in the array is the descriptor, so accessing the other elements in the array should require a lot of modification.
For the number composition, it is composed of data of the same size or elements of the same size, and is stored continuously, and the common access method is the vector descriptor, because the address in the vector descriptor word is the byte address, so in the conversion process, the basic address should be added first. For conversions, it is mainly done automatically by the hardware, and in this process, special attention is paid to alignment so as not to cross the array boundary.
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In fact, this is very simple, through different time periods to distinguish instructions and data, that is, in the instruction stage (or take the microprogram) to take out the instruction, in the execution of the instruction stage (or the corresponding microprogram) to take out the data. If distinguished by address **, the removal of the memory unit address provided by the PC is the instruction, and the removal of the storage unit address provided by the instruction address code part is the operand.
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In a computer where the program is stored, both instructions and data are stored in the memory in binary form. Because they are all binary**, it is not clear from the internal identity stored in the memory that it is instructions or data. When a computer reads an instruction, it treats all information read from memory as an instruction, and when it reads data, it treats all information read from memory as operands.
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The CPU does not distinguish between data and instructions, and only recognizes high and low levels, that is, 0,1 signals.
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The CPU just executes the instructions... Got it.
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Depending on the stage of the instruction cycle, it is necessary to distinguish between instructions and data.
The working process of the CPU is divided into the process of taking instructions, analyzing instructions, and executing instructions. (There is no why, just open your mouth before eating).
Usually, what is obtained in the instruction extraction stage is the instruction, and the data is retrieved in the re-execution stage.
You may wonder why it is not based on the decoding result of the instruction opcode.
Because the command opcode is extracted after the instruction is fetched, the opcode tells ALU what kind of operation to perform, not the instruction.
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The first instruction loaded by the computer must be an instruction, and then according to this instruction to take the binary number, if this instruction is to take the operand, then the exit is the operand; If the instruction is to take down the next instruction, then the removal is the instruction.
Separating instructions from data is for security and logical clarity.
Instructions and data are stored in the same format, but the timing of accessing them is differentIn the instruction period, the CPU takes the instruction through the instruction stream, stores it in the instruction register, and then interprets and executes the instruction, and during the instruction execution period, the CPU takes the data through the data stream and stores it in the data register.
So the instruction stream takes the instruction, and the data stream takes the data.
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Each instruction executed by the computer can be divided into three stages. That is, to take the instruction--- analyze the instruction --- execute the instruction.
The task of fetching instructions is to read the current instructions from the program memory according to the value in the program counter PC and send them to the instruction register.
The process of computer execution is actually to repeat the above operation process one by one, until it encounters a shutdown instruction and can wait for instructions in a loop.
When a general computer is working, it first sends programs and data to the memory through the input interface circuit and data bus through external devices, and then takes them out one by one for execution. However, the programs in the microcontroller are generally solidified in the on-chip or off-chip program memory by the writer beforehand. Therefore, the command can be executed as soon as the machine is turned on.
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Generally, it is executed in order, and it will also jump according to the instruction requirements, select conditions, or run in cycles. The speed at which it executes instructions depends on the internal structure of the CPU and the frequency of the CPU.
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It can only give you an analogy at the same time, and the specific is not cleared.
For example, if 2 programs are executed at the same time, and the CPU will give 80% to one of them, and the other can only occupy 20%, if there is another city to join, then the occupation of 1 and 2 will be relatively reduced, and if 1 is completed, then 2 will become the main one, and the occupation rate of process 3 will increase.
I don't really remember what that means, but I talked about it in the first grade computer basics.
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Through the instruction set.
intel sse sse2 sse3
amd am+
through these instruction sets.
There is no such thing as redemption.
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