Glue dual core? Asynchronous dual core? Introduction of glue dual core

Actually listen to the nonsense blowing on the Internet,Qualcomm's 8x60These two CPUs are A8 derivative architecture,A8 is designed by ARM for single-core use,A9ARM native only has out-of-order instructions,That is to say, A9 supports dual-core and multi-core。 However, 8x60** is Qualcomm's own modification, and some out-of-order instructions have been added to the A8 architecture, so it supports dual-core, but it has always been different from the original A9 dual-core performance advantages, so in order to compensate for this gap, 8X60 is the earliest CPU with high frequency, but it has to take into account energy consumption, so it is designed as an asynchronous architecture. Actually, 8x60 dual-core is indeed slightly inferior to A9, but for example, Tegra2, this A9 dual-core U, due to the lack of some multi-** instructions and the deletion of bandwidth, so the performance does not have to be much stronger than 8x60.

As for what sticks together, I haven't really seen the CPU stick, those people are just showing off the lower limit of the show. The dual-core performance of the mobile phone does not need to be too particular, and it is enough to play games and surf the Internet. Is there really something, are you looking for a notebook dual-core or a high-performance mobile phone dual-core?

Glue is the image name given by netizens... Asynchronous 8260 is asynchronous dual-accounting, and the real dual-core M1S is actually grass to Xiaomi, which is to die.

In fact, the asynchronous dual-core I imagined is not like this, but the definition is that.

Tiger nosebleed] can be counted like this, that 4-core CPU can't be 10+ GHz

A processor manufactured using a special method that packages two or more chips together. Because this special method is like gluing two or more cores together with glue, Ming Chunchao got the name "glue dual-core".

Finally, we can feel why some international manufacturers want to use what we commonly call MCM "glue" technology on the most cutting-edge chip products, in fact, sometimes glue technology is not necessarily a symbol of backwardness, but only a way to achieve the purpose

1.Achieve higher inter-chip transfer performance For example, Intel Pentium Pro is embedded in L2 Cache for performance, or Microsoft ATI Xenos is embedded in EDRAM for performance, in addition, IBM mainframe processors, and Power4 4+ 5 5+, etc., also use MCM "glue" technology for performance, performance is the first priority, and more integration is secondary.

2.Higher Integration, Multi-Core Race In order to accelerate the launch of dual-core and multi-core, Intel has taken three steps and two steps to catch up, using not only multi-core integration technology at the bare die level, but also multi-core integration technology at the packaging level.

3.For elasticity and rapid development There is another reason why Xenos implements embedded EDRAM, which is to develop flexibly and accelerately. Since EDRAM technology is not ATI's specialty, but NEC's strength, although ATI and NEC can work more closely together to design EDRAM and C1 at the die level and then mass production, there are some concerns to do so.

For example, ATI and NEC have to spend more collaborative efforts, especially at the level of physical circuit design, and when the physical circuit process is replaced, both parties must re-communicate and redesign the physical circuit design. In addition, in addition to the communication efforts such as design collaboration and circuit revision, it will also tie up the development progress of both parties in their original own fields, so that the momentum of progress in the original business that they are good at will be slowed down, and other peers will have the opportunity to catch up.

Therefore, it is advisable to design and develop separately separately, and finally use MCM packaging to accelerate the interconnection, so as to obtain higher performance than the PCB circuit board level, but with the development and design flexibility that the die bare die level does not have. It is clear that MCM will be a technology that is higher in integration and interconnect performance than the board layer, but higher in circuit development and design flexibility than the bare die layer, and it is believed that the application of this technology will become more and more widespread in the future.