8086 Odd and even address issues, what are the differences in 8086 reading and writing the word type

This second sentence is incorrect, and the storage address starts with odd or even addresses. When a word is stored from an even address, it is called word alignment, so it is stored all at once! If you start with an odd address, you need to save it twice, the first time you save the low bytes, the address plus one, and the second time you save the high bytes.

mov [1001h] ax

Al-Cun [1001h].

AH storage [1002h].

In the 8086 processor, a parity address is an address in memory where the last digit of the address line is a 1. In 8086, the memory address line is 16 bits, so there are 2 16 addresses, and the address with the last digit of 1 is an odd-even address.

In 8086, odd-even addresses are used to access two-word (32-bit) data in memory. Since 32-bit data needs to access 4 bytes (8 bits per byte), it needs to use 4 memory addresses to store. When accessing two-word data, the 8086 processor simultaneously accesses the odd and even addresses of the memory address where the data is located, combining them into a single 32-bit data.

For example, if we want to access two-word data with an address of 0x12345678 in memory, then we need to access four bytes with address 0x x1234567a and 0x1234567b. Among them, the odd addresses are 0x12345678 and 0x1234567a, and the even-numbered addresses are 0x12345679 and 0x1234567b.

It should be noted that when using odd-even addresses to access double-word data, it is necessary to ensure that the data is word-aligned in memory, that is, the last digit of the memory address where the data is located must be 1 or 0. If the data is not word-aligned in memory, then errors may occur when accessing.

The word data at the beginning of the even address, called the alignment word, can be read once.

The word data at the beginning of the odd address should be read twice, the first time the data of the odd address is read as the lower 8 bits, and the second time, the data of the odd address +1 (even address) is read as the upper 8 bits.

The 8086 is a 16-bit system.

0000 1000 odd addresses, read from 1000, one cycle, this cycle only reads up to 1 byte.

0000 0000 a cycle, this cycle reads 2 bytes 0001 0000 a cycle, this cycle only reads 1 byte for a total of 3 cycles, a total of 4 bytes are read, that is, a double word.

I don't know what language you use, generally, % is used to take the modulo, that is, to judge the value of i%2 first, if i can be divided by 2, then, the modulo is naturally 0, we know, 0 in the computer, also means no or false.

So, if(i%2) means that if i can't be diminished by 2, then add the value of i to s1 and assign it to s1

The function is to add first, and then assign the value to the left, please refer to it.

2 bus cycles.

The first time to read the data of the outgoing address from the high 8-bit data bus;

The second time the data of the even address is read from the lower 8-bit data bus.

There are only 8086 points of parity storage and 8088 points of no odd and even.

The 8086's memory consists of two 512KB memory blocks. Each memory uses its own 8-bit data line. 16 in total.

A total of 19 address lines from A19 A1 determine the 512KB memory unit. These 19 address lines are shared by both storage bodies.

However, the A0 bit connects the chip selection end of the even memory and the BHE connects the chip selection end of the odd storage body, both of which are low valid. That is, when A0 0, the puppet storage body is valid, and the data is transmitted by D7-D0. When BHE=0, the odd storage body is valid, and the data is transmitted with d15-d8.

When both are 0, both memory bodies are valid, and both d15-d0 transmit data. When both are 1, they are invalid, and neither d15-d0 can transmit data. (ENDS).

The 1M byte memory address space in the 8086 system is actually divided into two 512K byte memory bodies - "even memory" and "odd memory", the even memory is connected to the low 8-bit data bus D0 D7 of 8086, the odd memory is connected to the high 8-bit data line D8 D15 of 8086, the address bus A1 A19 is connected to the address line A0 A18 in the two memory bodies, and the lowest bit address line A0 and the "bus height allowable" BHE* are used to select even and odd storage respectively. This method of connection is called "odd-even splitting".

The 32-bit Windows operating system can also run in real mode, and a DOS window you open is a real mode.

However, he can simulate multiple real patterns.

The 16-bit registers are still there, why aren't they supported?

Odd-even split bar lz said.

I have collected the question of hugging the master, and I hope that a strong man will answer it.

I really don't know what a parity is.

8086 8088 I studied in college.,I don't remember this thing.。。。

Wef God is strong,

Dizzy, 8086 and 8088 are all 16 for the CPU, 32 for the CPU are running in protected mode, 16 bits are not supported, why study 8086 and 8088.

The addressing space remains unchanged and can be understood as follows: the address bus A1 A19 (note that A0 is not included) is connected to the memory address line A0 A18, while the high level A0 of the address bus is not connected to the memory body, which indicates from which memory the access is made. There are two memories in total, assuming that memory A is odd memory and memory B is even memory, then when A0 is 0 (even), it means access from memory B, and 1 (odd) means access from memory A.

For example, suppose you want to access the address 0x905, and the binary is expressed as.

-20 bits (a0 a19) -

-19-bit (a1 a19) --

where high bit A0 is 1, which means access from memory A. If the access address is 0x105, a0 is 0 and is accessed from memory b.

All 20 bits can be changed, so the addressing range remains unchanged at 1m

The storage space in the mu needs to be numbered, and the CPU can correspond to the unit according to the numbering range.

It's the same as the room number.

Then the number of roots of the address bus directly determines the number of numbers.

For example, one can be numbered 0 or 1

Two heels, can be 00 01 10 11

We can find that the law is actually n address buses with missing chains.

Its numbered number is 2 to the nth power.

For example, a 32-bit processor, 32 address buses, 2 numbers to the 32nd power, and 1b small for each space

Then 2 32 2 10 2 10 2 10 = 2 2 GB, that is, 4G divided by 3 2s to the 10th power, is to convert B to GB

That is, 32 is a CPU with a 32-bit system, and the accessible memory size is 4G

Absolutely, no problem. It can be both even and odd. It can also be both.

Example: 80h, 82h, 84h, and 86h are all even addresses.

81h 83h 85h 87h are all odd addresses.

81h 82h 83h 84h odd and even addresses are available.

Port A, Port B, Port C, Control Port.

Because the data bus is 8-bit, in order to be compatible with the previous 8-bit machine. But you seem to be asking 8088.