How to implement the debugging of the CPLD counting function?

Counters, huh? If it is not necessary, it is generally not recommended to use CPLD as a beam counting device, which consumes resources very much, and if it is necessary, it is also recommended to use a counter of 2 to the n power.

600 base, how many digits do you want to make?

It is estimated that 1 digit can consume about 30 vertical potato macros. This rubber dust is a wasteful act.

The function you require can be easily achieved by CPLD, and you can choose according to the package and voltage.

There are several ways to do this:

1.Using the external addressing mode of 8951, the data bus of the single-chip microcomputer, part of the address bus and the control bus are connected to the cpld, and then the data is read according to the external addressing time series of the single-chip microcomputer in the cpld, which is the simplest and fastest cpld processing. But the disadvantage is that there are a lot of wires that need to be connected.

1) Ordinary UART serial communication mode: a start bit, an 8-bit data bit, an end bit, cpld detects the falling edge, thinks that new data is coming, and then starts to read the data into the port, of course, the baud rate is up to you.

2) SPI mode: This requires a single-chip microcomputer test port to simulate two data lines and one clock line.

The CPLD starts reading data as soon as it detects a rising edge.

The UART method is simple, because the 51 microcontroller itself integrates serial communication peripherals, but the SPI communication speed is fast.

Hope it helps!

The simplest is to use cpld to simulate an SPI interface, the protocol is relatively simple, 3 with the line is good (a chip to select CS, a data input DI, a data output DO), and then define a few commands. It would be better if the landlord understood the I2C protocol, just two wires.

The key is in the communication protocol, depending on how you define it, the simple CPLD detection of the high and low levels of the single-chip microcomputer is also communication.

Parallel, IIC, UART, SPI, depending on your hardware resources, protocol proficiency and project requirements.

Of course, you can use a 1kHz clock and use the counter function to achieve it. It is triggered by the rising or falling edge of the clock, the front is set to logic 1, and it is triggered 30 times (i.e. counted to 30), and the level can be changed once.

Or you can set the timescale time to 1ms, and then use the symbol through the delay.

Write a reset signal RST and clock drive signal CLK in Always, the two work together, RST is valid to reset, CLK is valid to count, and so on. always@(posedge rst or posedge clk)..

Define a signal to assign the value of a in when the clock changes, and use the if statement to determine the value of the signal and a in as a judgment similar to that of the ain.