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MCS 51 series microcontroller.
There are five types of instruction systems, which are:
1. Data transmission instructions.
2. Arithmetic operation instructions.
3. Logical operation instructions.
4. Control the transfer instruction.
5. Boolean processing instructions.
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The MCS-51 MCU's command system has seven addressing methods, which are:
1. Immediate addressing.
Immediate addressing is to put the operand immediately after the opcode, and put it in the instruction ** section together with the opcode, when the program runs, the program directly calls the operand, and does not need to go to other address units to get the corresponding operand, and the operand written in the instruction is also called the immediate number.
2. Direct addressing.
Direct addressing indicates the address in memory directly in the field of the address in the instruction format. Since the address of the operand is given directly without some transformation, this addressing method is called direct addressing. The operand number involved in the operation and the main memory address stored in the operation result are directly given in the instruction, that is, the valid address is directly given in the instruction.
3. Register addressing.
Register addressing means that the operand is in the register, and the value of the RRR three digits in the instruction opcode and the status of RS1 and RS0 in the PSW select a register in a working register area, and then perform the corresponding instruction operation.
4. Register indirect addressing.
Register indirect addressing is to specify the register content as the address, and the unit content specified by the address as the operand. MCS-51 specifies R0 or R1 as an indirect addressing register, which addresses the contents of a 128-byte unit of an internal RAM low-level address. A data pointer (DPTR) can also be used as an indirect addressing register to address the 64K byte space of an external data memory, but the special function registers cannot be addressed using this addressing method.
5. Relative addressing.
Relative addressing is based on the current value of the program counter PC (the value in R15), and the address designator in the instruction is used as an offset, and the two are added to obtain the valid address of the operand.
6. Variable addressing.
The sum of the contents of the address change register (usually the amount of displacement) and the address given in the instruction address code part (usually the first address) as the address of the operand to obtain the required operand is called address changeable.
7. Bit addressing.
The way in which bitwise operations are performed on the content in a bit address is called bit addressing. Since only some units of the internal RAM and special function registers in the microcontroller have bit addresses, bit addressing can only address these two spaces with bit addresses.
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The command system of MCS-51 microcontroller has 7 addressing methods. They are: 1, immediate addressing,; 2. Direct addressing; 3. Register addressing; 4. Register indirect addressing; 5. Variable address addressing; 6. Relative addressing; 7. Bit addressing.
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MCS 51 series microcontroller.
There are five types of instruction systems, which are:
1. Data transmission instructions.
2. Arithmetic operation instructions.
3. Logical operation instructions.
4. Control the transfer instruction.
5. Boolean processing instructions.
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Summary. As shown in the figure, it is the off-chip bus structure diagram of MCS-51 microcontroller classified by pin function. From the figure, we can see that in addition to the power supply, reset, clock access, and user IO port, the pins of the single-chip microcomputer are set up to realize the system expansion.
A total of 4 x 8 = 32 IOs P0, P1, and P2 are used as external address lines |Data line (time-sharing multiplexing in the control line of PSEN), P2 as a high-level address line, P1, P3 have nothing to do with the external bus, only used as standard IO and multiplexing functions, but some single-chip microcomputer manufacturers have made some changes, the specific situation depends on the production of single-chip microcomputer. The MCS-51 has a programmable full-duplex serial port to enable serial data transmission between the microcontroller and other devices. The serial port is highly functional and can be used as both a full-duplex asynchronous communication transceiver and a shifter.
rxd( pin is the receive port, txd (pin is the send port.) Middle.
What are the buses of MCS-51 microcontrollers? What pins are they?
Fellow, I really didn't understand, I can be more specific.
As shown in the figure, it is the off-chip bus structure diagram of MCS-51 microcontroller classified by pin function. From the figure, we can see that in addition to the power supply, reset, clock access, and user IO port, the pins of the single-chip microcomputer are set up to realize the system expansion. These pins form the MCS-51 microcontroller off-chip three-bus structure, namely:
Address Bus (AB): Address. A total of 4 x 8 = 32 IOs P0, P1, and P2 are used as external address lines |Data line (time-sharing multiplexing in the control line of PSEN), P2 as a high-level address line, P1, P3 have nothing to do with the external bus, only used as standard IO and multiplexing functions, but some single-chip microcomputer manufacturers have made some changes, the specific situation depends on the production of single-chip microcomputer.
The MCS-51 has a programmable full-duplex serial port to enable serial data transmission between the microcontroller and other devices. The serial port is highly functional and can be used as both a full-duplex asynchronous communication transceiver and a shifter. rxd( pin is the receive port, txd (pin is the send port.) Middle.
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The command system of MCS-51 provides two highly powerful cyclic control commands.
Hello dear, MCS-51 is a common microcontroller, and its command system provides a lot of useful instructions, including two cyclic control instructions, which are "DJNZ" and "CJNE". The function of the djnz instruction is to subtract 1 from the travel register, if the result is not 0, then jump to the specified sock stool address for execution, otherwise continue to execute the next command. The djnz instruction is usually used to implement loops, which can be easily used to traverse counters or arrays, and can also be used in scenarios such as latency.
The opcode of the djnz command is "djnz rn, rel", where rn is a register and rel is a relative address, indicating the destination address of the jump. The function of the cjne instruction is to compare the two operands, and if they are equal, jump to the specified address for execution, otherwise move on to the next instruction. CJNE directives can implement many useful functions, such as conditional branching, loop control, etc.
The opcode for the cjne instruction is "cjne a, data, rel" or "cjne rn, data, rel", where a or rn is a register, data is an immediate number that represents the value to be compared, and rel is a relative address that represents the destination address of the jump. <>
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The operand represents the number of operations that took part or the address where the operands are located (i.e., the number of places where the operands are stored).
Because the microcontroller is a programmable device, it only "recognizes" the binary code). In order for the MCU to operate, all the instructions in the MCU system must be represented in the form of binary encoding.
For example, in Intel's MCS 51 series microcontroller, the instruction ** to take out a number from the memory to the accumulator in the CPU (in the combinator, the special register that participates in the calculation and stores the calculation result) is 74 hours, the ** of the accumulator content is 24 hours, plus the immediate number **, and the ** of the accumulator to send the number to the internal RAM memory is F6H F7H, etc. These instructions are machine codes that represent binary in hexadecimal.
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None of them are right.
c), 100% correct, but this is nonsense and certainly cannot be chosen.
d), also nonsense, can not be chosen.
a), (b), are incomplete.
You can only choose (c).
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Scheduled interrupts, external interrupts?
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